commit | fb5427508abbd635e877fabdf55795488119c2d6 | [log] [tgz] |
---|---|---|
author | Nicolas Ferre <nicolas.ferre@atmel.com> | Mon Jul 04 16:17:53 2011 +0200 |
committer | Artem Bityutskiy <artem.bityutskiy@intel.com> | Sun Sep 11 15:02:15 2011 +0300 |
tree | fc37be0505a74d27df25111f851843ea271c9eb2 | |
parent | 57b078a09bf0ab3f0babcfe6ecb2ac226d9178be [diff] |
mtd: atmel_nand: optimize read/write buffer functions For PIO NAND access functions, we use the features of the SMC: - no need to take into account the NAND bus width: SMC will deal with this - use of an IO memcpy on the NAND chip-select space is able to generate proper SMC behavior. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Artem Bityutskiy <dedekind1@gmail.com>