commit | 65da0d40e561a717fee065d69d6e4f8d5b34db32 | [log] [tgz] |
---|---|---|
author | James Zhu <James.Zhu@amd.com> | Fri Sep 29 16:47:31 2017 -0400 |
committer | Alex Deucher <alexander.deucher@amd.com> | Fri Oct 06 17:44:11 2017 -0400 |
tree | b49c5bd822cbeb0713db9aeb190e29010a8f72f6 | |
parent | e0128efb08b3d628d767ec8578e77cdd7ecc8f81 [diff] |
drm/amdgpu: add uvd enc irq Add UVD encode IRQ handle and enable the UVD encode trap Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>