| commit | f8b13d9bcc674efa3af2d75414fa612936a5a2ea | [log] [tgz] |
|---|---|---|
| author | Maxime Ripard <maxime@cerno.tech> | Thu Sep 03 10:00:56 2020 +0200 |
| committer | Maxime Ripard <maxime@cerno.tech> | Mon Sep 07 18:03:44 2020 +0200 |
| tree | 381a9790834c8379f1eaa6914998ed9a7bf50617 | |
| parent | d2f06525f67d1c224589087feca70c9a214237b2 [diff] |
drm/vc4: hvs: Make sure our channel is reset In order to clear our intermediate FIFOs that might end up with a stale pixel, let's make sure our FIFO channel is reset every time our channel is setup. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Link: https://patchwork.freedesktop.org/patch/msgid/b34c562b36177c758dd2e9d84bceb07689bfbe05.1599120059.git-series.maxime@cerno.tech