| commit | f83f5a1e115c8dc382a5abaaf0c10374fbcf1038 | [log] [tgz] |
|---|---|---|
| author | James Zhu <James.Zhu@amd.com> | Tue Dec 03 15:40:10 2019 -0500 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Thu Dec 05 16:24:28 2019 -0500 |
| tree | c05c52a817318115f0c3a974f52e2203340a17ad | |
| parent | 79c4c8ea913076338e70252f947a8805daa8f91b [diff] |
drm/amdgpu/gfx: Improvement on EDC GPR workarounds SPI limits total CS waves in flight per SE to no more than 32 * num_cu and we need to stuff 40 waves on a CU to completely clean the SGPR. This is accomplished in the WR by cleaning the SE in two steps, half of the CU per step. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>