[ARM] Kirkwood: small L2 code cleanup
Strictly speaking, a MCR instruction does not produce any output.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 1afed50..6e77c04 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -258,9 +258,7 @@
static void __init __invalidate_icache(void)
{
- int dummy;
-
- __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : "=r" (dummy));
+ __asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
}
static int __init invalidate_and_disable_icache(void)