| commit | 507ddd5c0d47ad869f361c71d700ffe7f12d1dd6 | [log] [tgz] |
|---|---|---|
| author | Vitaly Gaiduk <vitaly.gaiduk@cloudbear.ru> | Mon Sep 09 20:19:24 2019 +0300 |
| committer | David S. Miller <davem@davemloft.net> | Wed Sep 11 23:37:35 2019 +0100 |
| tree | c7bde313c5db5c05dd9e3966272f5ad10b791d2e | |
| parent | a2111c460c0c6b046b9965b37084098ff8254349 [diff] |
net: phy: dp83867: Add SGMII mode type switching This patch adds ability to switch beetween two PHY SGMII modes. Some hardware, for example, FPGA IP designs may use 6-wire mode which enables differential SGMII clock to MAC. Signed-off-by: Vitaly Gaiduk <vitaly.gaiduk@cloudbear.ru> Signed-off-by: David S. Miller <davem@davemloft.net>