commit | e867e8fa825dd4fae2514883d77f5954d8d90991 | [log] [tgz] |
---|---|---|
author | Chanwoo Choi <cw00.choi@samsung.com> | Thu Aug 25 15:57:17 2016 +0900 |
committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | Fri Sep 09 17:35:08 2016 +0200 |
tree | 3235650c4d900986c7d83a653e1d914eb2850ebc | |
parent | ba9d05d9728e229eaebc68c42215ed391f473263 [diff] |
clk: samsung: exynos5420: Add clocks for CMU_CDREX domain This patch adds the mux/divider clocks for CMU_CDREX (DRAM Express Controller) which generates the clocks for DRAM and NoC (Network on Chip) bus. There is differnet source of MUX_MX_MSPLL_CCORE between exynos5420 and exynos5422, so each MUX_MX_MSPLL_CCORE uses the different parent source group. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>