tree 4c4dbe1a92b11c5682e6dd96dc4fc3159a614485
parent e275d2109cdaea8b4554b9eb8a828bdb8f8ba068
author Tony Lindgren <tony@atomide.com> 1603699727 +0200
committer Tony Lindgren <tony@atomide.com> 1603699733 +0200

bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw

Bail out early from sysc_wait_softreset() just like we do in sysc_reset()
if there's no sysstatus srst_shift to fix a bogus resetdone warning on
enable as suggested by Grygorii Strashko <grygorii.strashko@ti.com>.

We do not currently handle resets for modules that need writing to the
sysstatus register. If we at some point add that, we also need to add
SYSS_QUIRK_RESETDONE_INVERTED flag for cpsw as the sysstatus bit is low
when reset is done as described in the am335x TRM "Table 14-202
SOFT_RESET Register Field Descriptions"

Fixes: d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit")
Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>