tree 02003b8794bf18b7ede2edc112d05570082d3ee9
parent ba9f39a785a9977e72233000711ef1eb48203551
author Ulf Hansson <ulf.hansson@linaro.org> 1544460758 +0100
committer Ulf Hansson <ulf.hansson@linaro.org> 1545033582 +0100

mmc: core: Use a minimum 1600ms timeout when enabling CACHE ctrl

Some eMMCs from Micron have been reported to need ~800 ms timeout, while
enabling the CACHE ctrl after running sudden power failure tests. The
needed timeout is greater than what the card specifies as its generic CMD6
timeout, through the EXT_CSD register, hence the problem.

Normally we would introduce a card quirk to extend the timeout for these
specific Micron cards. However, due to the rather complicated debug process
needed to find out the error, let's simply use a minimum timeout of 1600ms,
the double of what has been reported, for all cards when enabling CACHE
ctrl.

Reported-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reported-by: Andreas Dannenberg <dannenberg@ti.com>
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>