| commit | e0301317acfed896c3bcbcbdf33f67f55c9d602b | [log] [tgz] |
|---|---|---|
| author | Trigger Huang <Trigger.Huang@amd.com> | Mon Jun 03 16:48:17 2019 +0800 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Tue Jun 11 12:39:51 2019 -0500 |
| tree | 76764f8fd4eedc65469d6b681244ead788e2787c | |
| parent | e038b9016aa88a9e1429f1b016644c509b8e58a6 [diff] |
drm/amdgpu: Hardcode reg access using L1 security Under Vega10 SR-IOV VF, L1 register access mode should be enabled by default as the non-security VF will no longer be supported. Signed-off-by: Trigger Huang <Trigger.Huang@amd.com> Reviewed-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>