| commit | cab07a5652d1d124b505c2b7ed21c6823295c5d7 | [log] [tgz] |
|---|---|---|
| author | Len Brown <len.brown@intel.com> | Fri Mar 27 20:54:01 2015 -0400 |
| committer | Len Brown <len.brown@intel.com> | Tue Mar 31 21:57:15 2015 -0400 |
| tree | d3944fd4847add04e7afb337ecb3d4e152ea7618 | |
| parent | d7ef76717322c8e2df7d4360b33faa9466cb1a0d [diff] |
intel_idle: Add support for the Airmont Core in the Cherrytrail and Braswell SOCs Support C-states for the Airmont core in the Cherrytrail and Braswell SOCs. The states are similar to those of Silvermont in Baytrail, except both flavors of C6 states are faster. Signed-off-by: Len Brown <len.brown@intel.com> Cc: Kumar P Mahesh <mahesh.kumar.p@intel.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com>