commit | 59a82d0e65539812652dffea160ef483c1d310f5 | [log] [tgz] |
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author | Alex Deucher <alexander.deucher@amd.com> | Tue Aug 13 12:48:06 2013 -0400 |
committer | Alex Deucher <alexander.deucher@amd.com> | Fri Aug 30 16:30:53 2013 -0400 |
tree | 69d81a30e2375cd3abf3e43863cc0941541400f0 | |
parent | 090f4b6ad38eec0c24dcdc9d01cc22077c3b9d22 [diff] |
drm/radeon/si: properly set up the clearstate buffer for pg (v2) The format of the clearstate buffer used for pg (powergating) changed between NI and SI. This formats it properly for what the hardware expects on SI. v2: fix addresses Signed-off-by: Alex Deucher <alexander.deucher@amd.com>