| commit | ad8cec7df5d4bf3b1109fabbb1d61663857045ae | [log] [tgz] |
|---|---|---|
| author | Rex Zhu <Rex.Zhu@amd.com> | Wed Nov 08 16:39:00 2017 +0800 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Wed Jan 10 15:44:55 2018 -0500 |
| tree | 6825d3ca0010c12b2294fe40be084d04914302c0 | |
| parent | d25426495f69be24b4f7b1da1c66ba6a34e49cdd [diff] |
drm/amd/pp: Implement get_max_high_clocks for CI/VI v2: add table length check. DC component expect PP to give max engine clock and memory clock through pp_get_display_mode_validation_clocks on DGPU as well. This patch can fix MultiGPU-Display blank out with 1 IGPU-4k display and 2 DGPU-two 4K displays. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>