commit | d3b688d3c69d318177c104f451b9064831da42b9 | [log] [tgz] |
---|---|---|
author | Xiang Chen <chenxiang66@hisilicon.com> | Mon Nov 07 20:48:30 2016 +0800 |
committer | Martin K. Petersen <martin.petersen@oracle.com> | Fri Nov 25 09:54:39 2016 -0500 |
tree | b7238352ae3ba08c4616cc8aac5590bf3c025d69 | |
parent | 2d76a2478bb8c54d241b23a699d55f90b7efd036 [diff] |
scsi: hisi_sas: add v2 hw support for ECC and AXI bus fatal error For ECC 1bit error, logic can recover it, so we only print a warning. For ECC multi-bit and AXI bus fatal error, we panic. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>