| commit | b5a0a9b59c8185aebcd9a717e2e6258b58c72c06 | [log] [tgz] |
|---|---|---|
| author | Rajat Jain <rajatja@google.com> | Mon Jan 02 22:34:12 2017 -0800 |
| committer | Bjorn Helgaas <bhelgaas@google.com> | Tue Feb 14 17:44:12 2017 -0600 |
| tree | 5965432f559df890e710532bfc6c8ad0472c59d2 | |
| parent | b2103ccbb67e3ef0f7a75d21c989f9614ddbcaca [diff] |
PCI/ASPM: Read and set up L1 substate capabilities The PCIe spec (r3.1, sec 7.33) says the L1 PM Substates Capability may be implemented only in function 0. Read the L1 substate capability structures of upstream and downstream components of the link and set it up in the device structure. [bhelgaas: add specific spec reference] Signed-off-by: Rajat Jain <rajatja@google.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>