EDAC, synopsys: Add ECC support for ZynqMP DDR controller
Add ECC support for ZynqMP DDR controller IP. The IP supports interrupts
for corrected and uncorrected errors. Add interrupt handlers for the
same.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
CC: Mauro Carvalho Chehab <mchehab@kernel.org>
CC: Michal Simek <michal.simek@xilinx.com>
CC: amit.kucheria@linaro.org
CC: devicetree@vger.kernel.org
CC: leoyang.li@nxp.com
CC: linux-arm-kernel@lists.infradead.org
CC: linux-edac <linux-edac@vger.kernel.org>
CC: mark.rutland@arm.com
CC: robh+dt@kernel.org
CC: sudeep.holla@arm.com
Link: http://lkml.kernel.org/r/1540447621-22870-5-git-send-email-manish.narani@xilinx.com
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 41c9ccd..ec2727b2 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -442,7 +442,7 @@
config EDAC_SYNOPSYS
tristate "Synopsys DDR Memory Controller"
- depends on ARCH_ZYNQ
+ depends on ARCH_ZYNQ || ARCH_ZYNQMP
help
Support for error detection and correction on the Synopsys DDR
memory controller.