| commit | ac204c1b34a2f0443265198a5e53795431794bd2 | [log] [tgz] |
|---|---|---|
| author | Rafael Antognolli <rafael.antognolli@intel.com> | Wed Feb 12 11:17:28 2020 -0800 |
| committer | Matt Roper <matthew.d.roper@intel.com> | Tue Feb 18 10:04:32 2020 -0800 |
| tree | e03bbe2d696adac4b8d176939e0452741b8cbb6b | |
| parent | de1df9535cc970e76ea49f9adb8f46424ca67061 [diff] |
drm/i915/tgl: Add Wa_1808121037 to tgl. It's not clear whether this workaround is final yet, but the BSpec indicates that userspace needs to set bit 9 of this register on demand: "To avoid sporadic corruptions “Set 0x7010[9] when Depth Buffer Surface Format is D16_UNORM , surface type is not NULL & 1X_MSAA" Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2501 Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com> [mattrope: Tweaked comment while applying] Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200212191728.25227-1-rafael.antognolli@intel.com