| commit | aab17139a0eec686bad80579f7a5d6969c998392 | [log] [tgz] |
|---|---|---|
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | Thu Jan 24 15:29:32 2013 +0200 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Thu Jan 24 22:34:37 2013 +0100 |
| tree | baa9d925d04f8b1d74a03eedcb248a68917c7ddc | |
| parent | b906487c515711d79e31ceb9fe75738574b5c3a2 [diff] |
drm/i915: PIPE M/N registers need an offset on VLV Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>