| commit | e6a59382924e2d007b554a2aebcd4445ebb01fef | [log] [tgz] |
|---|---|---|
| author | Chris Wilson <chris@chris-wilson.co.uk> | Mon Aug 06 15:46:04 2018 +0100 |
| committer | Chris Wilson <chris@chris-wilson.co.uk> | Mon Aug 06 20:34:49 2018 +0100 |
| tree | 0c22453c04666ac98b025e1a78f5a6c8e67a2095 | |
| parent | a6476ebd4350d51146ef0492b4b06bc0d31e8827 [diff] |
drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start Experience teaches us over and over again that coherency on Baytrail requires the odd heavy hammer, and in particular clflush alone is not enough to guarrantee that writes from the CPU are picked up by the CS. Do as we do elsewhere and ensure we have an unconditional i915_gem_chipset_flush() after writing to memory and submitting a batch to HW. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107499 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180806144604.8346-1-chris@chris-wilson.co.uk