| commit | 3731d12dce83d47b357753ffc450ce03f1b49688 | [log] [tgz] |
|---|---|---|
| author | Rex Zhu <Rex.Zhu@amd.com> | Tue Jan 10 19:26:49 2017 +0800 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Thu Jan 12 17:39:11 2017 -0500 |
| tree | e873e0ff705c220f99c8c1959ca5805ab9042dc6 | |
| parent | a628392cf03e0eef21b345afbb192cbade041741 [diff] |
drm/amd/powerplay: fix vce cg logic error on CZ/St. can fix Bug 191281: vce ib test failed. when vce idle, set vce clock gate, so the clock in vce domain will be disabled. when need to encode, disable vce clock gate, enable the clocks to vce engine. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>