tree fee47f694f4429e405a4667368c7f4056a8bfe52
parent 7f1ae07b51e8b617922b2b73850361eafa17a684
author Vivien Didelot <vivien.didelot@savoirfairelinux.com> 1478226214 +0100
committer David S. Miller <davem@davemloft.net> 1478284800 -0400

net: dsa: mv88e6xxx: add port's RGMII delay setter

Some chips such as 88E6352 and 88E6390 can be programmed to add delays
to RXCLK for IND inputs or to GTXCLK for OUTD outputs when port is in
RGMII mode.

Add a port function to program such delays according to the provided PHY
interface mode.

Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>