| commit | dd7de4c0023e7564cabe39d64b2822a522890792 | [log] [tgz] |
|---|---|---|
| author | Alexandre Belloni <alexandre.belloni@bootlin.com> | Thu Apr 16 22:54:27 2020 +0200 |
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | Sun Apr 19 17:50:02 2020 +0100 |
| tree | d5fdf54eac7f63a6bbc973a4b504269f726d22e7 | |
| parent | 0a2bf9200aeaa8c1dd23ec65af30af3643ace887 [diff] |
iio: adc: ti-ads8344: properly byte swap value
The first received byte is the MSB, followed by the LSB so the value needs
to be byte swapped.
Also, the ADC actually has a delay of one clock on the SPI bus. Read three
bytes to get the last bit.
Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>