| commit | 9eb7aa891101a4a09114ff3191f9877ea35eae06 | [log] [tgz] |
|---|---|---|
| author | Marc Kleine-Budde <mkl@pengutronix.de> | Tue Sep 01 08:57:55 2015 +0200 |
| committer | Marc Kleine-Budde <mkl@pengutronix.de> | Mon Feb 06 15:13:42 2017 +0100 |
| tree | 33826e4957f696a23f55d007d71a44490082b5bd | |
| parent | 4bd888a80b1d48dbd83f1cbf806e923a30051958 [diff] |
can: flexcan: add quirk FLEXCAN_QUIRK_ENABLE_EACEN_RRS In order to receive RTR frames in the non HW FIFO mode the RSS and EACEN bits of the reg_ctrl2 have to be activated. As this has no side effect in the FIFO mode, we do this unconditionally on cores with the reg_ctrl2. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>