commit | 880495e2f00b68633aaa264d7633c419e0c7b2d1 | [log] [tgz] |
---|---|---|
author | Felix Fietkau <nbd@nbd.name> | Tue Jul 16 18:12:07 2019 +0200 |
committer | Felix Fietkau <nbd@nbd.name> | Thu Sep 05 17:42:30 2019 +0200 |
tree | 913930600bf866cb915e9d45fcec860b047f32de | |
parent | 27c7bfc5f0633a5a98f35ff418de7945699dd497 [diff] |
mt76: mt7615: add missing register initialization - initialize CCA signal source - initialize clock for band 1 (7615D) - initialize BAR rate Reviewed-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>