tree 2244c8b36cea2440b44d6348c3ca43155d8f5aca
parent ce397d215ccd07b8ae3f71db689aedb85d56ab40
author Heiner Kallweit <hkallweit1@gmail.com> 1533501063 +0200
committer Bjorn Helgaas <bhelgaas@google.com> 1534281062 -0500

PCI/MSI: Set IRQCHIP_ONESHOT_SAFE for PCI-MSI irqchips

If flag IRQCHIP_ONESHOT_SAFE isn't set for an irqchip and we have a
threaded interrupt with no primary handler, flag IRQF_ONESHOT needs to be
set for the interrupt, causing some overhead in the threaded interrupt
handler.  For more detailed explanation also check following comment in
__setup_irq():

  The interrupt was requested with handler = NULL, so we use the default
  primary handler for it. But it does not have the oneshot flag set.  In
  combination with level interrupts this is deadly, because the default
  primary handler just wakes the thread, then the irq lines is reenabled,
  but the device still has the level irq asserted.  Rinse and repeat....

  While this works for edge type interrupts, we play it safe and reject
  unconditionally because we can't say for sure which type this interrupt
  really has.  The type flags are unreliable as the underlying chip
  implementation can override them.

Another comment in __setup_irq() gives a hint already that this
overhead can be avoided for PCI-MSI:

  Some irq chips like MSI based interrupts are per se one shot safe.  Check
  the chip flags, so we can avoid the unmask dance at the end of the
  threaded handler for those.

Following this let's mark all PCI-MSI irqchips as oneshot-safe.

See also discussion here:
https://lkml.kernel.org/r/alpine.DEB.2.21.1808032136490.1658@nanos.tec.linutronix.de

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>