| commit | 846c6b26d38e56e5004f1d71d4c13226d2514750 | [log] [tgz] |
|---|---|---|
| author | Imre Deak <imre.deak@intel.com> | Thu Jun 29 18:36:58 2017 +0300 |
| committer | Imre Deak <imre.deak@intel.com> | Thu Jul 06 16:28:41 2017 +0300 |
| tree | 83b820f8cd6e036b5cd70a4ec4a41b7d9216a270 | |
| parent | cb0aeaa81842948e32f39838f0ec113e3bb52291 [diff] |
drm/i915/gen9+: Add 10 us delay after power well 1/AUX IO pw disabling Bspec requires a 10 us delay after disabling power well 1 and - if not toggled on-demand - the AUX IO power wells during display uninit. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1498750622-14023-2-git-send-email-imre.deak@intel.com