| commit | 7e3bc3a98fd1df5839cdc5cbce4dfdb9e4c03655 | [log] [tgz] |
|---|---|---|
| author | Sean Paul <seanpaul@chromium.org> | Tue Oct 07 16:04:42 2014 +0200 |
| committer | Thierry Reding <treding@nvidia.com> | Thu Nov 13 16:12:44 2014 +0100 |
| tree | 5102e5b23e0b99e064e23a2ae1dced15bb6ecb25 | |
| parent | 030611ecc5d8b1daf8de110600c8771de45d398d [diff] |
drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized when the clocks are set up as opposed to when the output is enabled. This makes sure that the PHY timings are properly set up when the panel is prepared and that DCS commands sent at that time use the appropriate timings. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>