| commit | 724a75524b1c77ea8abb96c21cdba05385b22b39 | [log] [tgz] |
|---|---|---|
| author | Mikita Lipski <mikita.lipski@amd.com> | Thu May 31 14:44:18 2018 -0400 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Thu Jul 05 16:38:40 2018 -0500 |
| tree | ab920e8917eddd04faa263949c2cad86882db2f2 | |
| parent | 015ec75918698e63f770c9bee0752ce802ed55e2 [diff] |
drm/amd/display: Convert 10kHz clks from PPLib into kHz The driver is expecting clock frequency in kHz, while SMU returns the values in 10kHz, which causes the bandwidth validation to fail Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>