| commit | 8743d2155aed9236202294e293ab13d33b3a7682 | [log] [tgz] |
|---|---|---|
| author | Dilip Kota <eswara.kota@linux.intel.com> | Fri Jul 17 14:27:54 2020 +0800 |
| committer | Mark Brown <broonie@kernel.org> | Wed Jul 22 01:55:57 2020 +0100 |
| tree | 012e47018031f1412ca26d67126add81d684a0d6 | |
| parent | 94eca904cb97f9cfa90e3e558fb73c49d2e42f91 [diff] |
spi: lantiq: Add fifo size bit mask in SoC specific data structure On newer chipsets, SPI controller has fifos of larger size. So add the fifo size bit mask entry in SoC specific data structure. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/a0889abf17a9fbc7077f10be0f0342b7ebdf9361.1594957019.git.eswara.kota@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>