i2c: qup: Correct duty cycle for FM and FM+
The I2C spec UM10204 Rev. 6 specifies the following timings.
Standard Fast Mode Fast Mode Plus
SCL low 4.7us 1.3us 0.5us
SCL high 4.0us 0.6us 0.26us
This results in a 33%/66% duty cycle as opposed to the 50%/50% duty cycle
used for Standard-mode.
Add High Time Divider settings to correct duty cycle for FM(400kHz) and
FM+(1MHz).
Signed-off-by: Austin Christ <austinwc@codeaurora.org>
Reviewed-by: Sricharan R <sricharan@codeaurora.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
1 file changed