| commit | 6d2c2b9f806a4ec81833af533d57395db856d5a3 | [log] [tgz] |
|---|---|---|
| author | Milo Kim <woogyom.kim@gmail.com> | Tue Nov 15 22:02:13 2016 +0900 |
| committer | Lee Jones <lee.jones@linaro.org> | Tue Nov 29 08:21:39 2016 +0000 |
| tree | b79c7d99b2bcb11901f2a2a4fa055ea7333fd56a | |
| parent | f66020640367affd8efa788dc3f904acac435244 [diff] |
mfd: tps65217: Update register interrupt mask bits instead of writing operation TPS65217 interrupt register includes read/writeable mask bits with read-only status bits. (bit 4, 5, 6 are R/W, bit 0, 1, 2 are RO) And reserved bit is not required. Register update operation is preferred for disabling all interrupts during the device initialisation. Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>