| commit | 1db27a7291195057e3a20fb9998e2d365ee897f9 | [log] [tgz] |
|---|---|---|
| author | Mika Kahola <mika.kahola@intel.com> | Thu Jul 11 10:31:03 2019 -0700 |
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | Thu Jul 11 16:31:10 2019 -0700 |
| tree | e4b30de3076ae397f3a15b1e619f7eab12506c34 | |
| parent | 656409bbaf8792c015708e567d4ebcd7fb4e7728 [diff] |
drm/i915/tgl: Add power well to support 4th pipe Add power well 5 to support 4th pipe and transcoder on TGL. Cc: James Ausmus <james.ausmus@intel.com> Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190711173115.28296-10-lucas.demarchi@intel.com