| commit | 63a450aa4d08ccf4f53e9fa59144e746e2288319 | [log] [tgz] |
|---|---|---|
| author | Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | Tue Apr 19 15:19:02 2016 +0100 |
| committer | Mark Brown <broonie@kernel.org> | Tue Apr 19 17:39:52 2016 +0100 |
| tree | 9620ad23d07d54586e12a031bd99984457725994 | |
| parent | f55532a0c0b8bb6148f4e07853b876ef73bc69ca [diff] |
ASoC: da7219: Update PLL ranges and dividers to improve locking The expected MCLK frequency ranges and the associated dividers are updated to improve PLL locking in a corner scenario, with low MCLK frequency near an input divider change boundary. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>