| commit | 620879c9e33262426db0ade650be5d7a2046377b | [log] [tgz] |
|---|---|---|
| author | Catalin Marinas <catalin.marinas@arm.com> | Mon Feb 05 14:47:46 2007 +0100 |
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | Thu Feb 08 14:49:18 2007 +0000 |
| tree | 458be4f1bed4cb143f40b6b438c49afe9e2cb248 | |
| parent | dcda7e4ba1adec80089ec784964b32f9fd653237 [diff] |
[ARM] 4127/1: Flush the prefetch buffer after changing the DACR The ARM Architecture Reference Manual specifies that a prefetch flush is needed after changing the DACR register (chapter B2.7.6). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>