| commit | f25c33724d1512a72554c0ad4cb70b43ba15374e | [log] [tgz] |
|---|---|---|
| author | Maurice Petallo <mauricex.r.petallo@intel.com> | Tue Jul 08 19:11:01 2014 +0800 |
| committer | Ulf Hansson <ulf.hansson@linaro.org> | Thu Jul 10 14:58:29 2014 +0200 |
| tree | 05aef5afbddc4d01c5facc90246293864f44e4dc | |
| parent | d61b59461b0cd0106f03e566d537b9072029e059 [diff] |
mmc: sdhci: add DDR50 1.8V mode support for BayTrail eMMC Controller This is to enable DDR50 bus speed mode with 1.8V signaling capability for BayTrail ACPI and PCI mode eMMC Controller. Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>