| commit | 5cd04c4846a3f910fc8a7150cae81542a0ab32d3 | [log] [tgz] |
|---|---|---|
| author | Harmanprit Tatla <harmanprit.tatla@amd.com> | Thu Aug 20 15:52:18 2020 -0400 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Tue Sep 15 17:52:40 2020 -0400 |
| tree | 0330a03c06ee20b3033b9a7c272e515558e5219b | |
| parent | 05e3d830fac89af58b9b6a78e5a498f2984cd2cf [diff] |
drm/amd/display: Fix CP_IRQ clear bit and logic [Why] Currently clearing the wrong bit for CP_IRQ, and logic on when to clear needs to be fixed. [How] Corrected bit to clear and improved logic for decision to clear. Signed-off-by: Harmanprit Tatla <harmanprit.tatla@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>