| commit | a1ead2ec3c098d2f94b8de8bb3f1929d27e9e7d5 | [log] [tgz] |
|---|---|---|
| author | Heiner Kallweit <hkallweit1@gmail.com> | Wed Jan 23 20:47:30 2019 +0100 |
| committer | David S. Miller <davem@davemloft.net> | Thu Jan 24 22:25:19 2019 -0800 |
| tree | 797276ef78e27b4f9ed39cb4dcb55b2ecc811a29 | |
| parent | c46863ab8356f0eb4a27dd65a2dc368e41198ad3 [diff] |
r8169: factor out PHY init sequence adjusting 10M and ALDPS Few chip versions use the same sequence to adjust 10M and ALDPS, so let's factor it out. This patch also fixes a (most likely) typo in rtl8168g_1_hw_phy_config. There bit 8 in reg 0x14 on page 0x0bcc was set and not cleared. According to the vendor driver this bit needs to be cleared in all cases. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>