commit | 54d557815e15ab8c28b559e493604478605f9e6b | [log] [tgz] |
---|---|---|
author | Sunil Goutham <sgoutham@marvell.com> | Wed Oct 10 18:14:22 2018 +0530 |
committer | David S. Miller <davem@davemloft.net> | Wed Oct 10 10:06:01 2018 -0700 |
tree | d34f7ac590d2fb6527132649c2b40393e0ad5ad0 | |
parent | 54494aa5d1e68945dc79feb7c8461cd382e11d8a [diff] |
octeontx2-af: Reset all RVU blocks Go through all BLKADDRs and check which ones are implemented on this silicon and do a HW reset of each implemented block. Also added all RVU AF and PF register offsets. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>