| commit | 47ed4e1c93a6c73f313022369c12ddd693890715 | [log] [tgz] |
|---|---|---|
| author | Ken Wang <Ken.Wang@amd.com> | Tue Jul 04 13:11:52 2017 +0800 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Fri Jul 14 11:06:06 2017 -0400 |
| tree | 3e822ce6750a35088368b8134a15353a82dc01c2 | |
| parent | 4426826c02dc367ec3c245ef5c5ca4dcdb45b4c8 [diff] |
drm/amdgpu: add workaround for S3 issues on some vega10 boards Certain MC registers need a delay after writing them to properly update in the init sequence. Signed-off-by: Ken Wang <Ken.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>