clocksource: mct: use fin_pll clock as the tick clock source for mct
With the migration of Exynos4 clocks to use common clock framework, the
old styled 'xtal' clock is not used anymore. Instead, the clock 'fin_pll'
is used as the tick clock for mct controller.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 545c989..f817c54 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -479,10 +479,13 @@
static void __init exynos4_timer_resources(struct device_node *np)
{
- struct clk *mct_clk;
- mct_clk = clk_get(NULL, "xtal");
+ struct clk *tick_clk;
- clk_rate = clk_get_rate(mct_clk);
+ tick_clk = np ? of_clk_get_by_name(np, "fin_pll") :
+ clk_get(NULL, "fin_pll");
+ if (IS_ERR(tick_clk))
+ panic("%s: unable to determine tick clock rate\n", __func__);
+ clk_rate = clk_get_rate(tick_clk);
reg_base = np ? of_iomap(np, 0) : S5P_VA_SYSTIMER;
if (!reg_base)