commit | 805b3ba87dfa7273567aed6e9c730e9b89b450d7 | [log] [tgz] |
---|---|---|
author | Rex Zhu <Rex.Zhu@amd.com> | Wed Nov 09 14:26:16 2016 +0800 |
committer | Alex Deucher <alexander.deucher@amd.com> | Tue Dec 06 18:08:22 2016 -0500 |
tree | bdfa72e20efe70f9653e3a663e2442e625ca3658 | |
parent | ad3b961423217eb96c436dc7973a81506444f7e5 [diff] |
drm/amdgpu: refine uvd 6.0 clock gate feature. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>