tree 6c488cf25b168ad13342a24ea69fac2ddcc92679
parent 5ab5d4048e6ed8811245a4ea45264456c180545e
author Thierry Reding <thierry.reding@gmail.com> 1384787496 +0100
committer Peter De Schrijver <pdeschrijver@nvidia.com> 1385484418 +0200

clk: tegra: Initialize DSI low-power clocks

The low-power DSI clocks are used during host-driven transactions on the
DSI bus. Documentation recommends that they be children of PLLP and run
at a frequency of at least 52 MHz.

Signed-off-by: Thierry Reding <treding@nvidia.com>