commit | 3613cf1d8854e64186edb8514f4f5c5b1a1ef679 | [log] [tgz] |
---|---|---|
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | Wed Nov 04 23:20:04 2015 +0200 |
committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | Wed Nov 18 14:35:13 2015 +0200 |
tree | 2494c35ff208e96138454b6f8f00f045062726cb | |
parent | e6c4c763661de5c7f3273c24a8878ea9521b27eb [diff] |
drm/i915: s/0x50/RING_PSMI_CTL/ Use the RING_PSMI_CTL define insted of hand rolling the register offset. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1446672017-24497-17-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 27b6ac9..b3698d0 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -873,7 +873,7 @@ struct drm_i915_private *dev_priv = dev->dev_private; if (INTEL_INFO(dev)->gen >= 6) { - ering->rc_psmi = I915_READ(ring->mmio_base + 0x50); + ering->rc_psmi = I915_READ(RING_PSMI_CTL(ring->mmio_base)); ering->fault_reg = I915_READ(RING_FAULT_REG(ring)); if (INTEL_INFO(dev)->gen >= 8) gen8_record_semaphore_state(dev_priv, error, ring, ering);