commit | 44ebaa5de1f922965d8aa215a6da729341b3deb2 | [log] [tgz] |
---|---|---|
author | Jorge Eduardo Candelaria <jorge.candelaria@ti.com> | Thu May 20 17:53:07 2010 -0500 |
committer | Liam Girdwood <lrg@slimlogic.co.uk> | Fri May 21 10:47:25 2010 +0100 |
tree | c6691f48e549ce928f4fb673cc33405221dbd725 | |
parent | ad8332c1302bcb4f80d593fd3eb477be9d7f5604 [diff] |
ASoC: TWL6040: Fix playback with 19.2 Mhz MCLK When using MCLK is configured for 19.2 Mhz, clock slicer should be enabled and HPPLL should be bypassed in clock path. Signed-off-by: Jorge Eduardo Candelaria <jorge.candelaria@ti.com> Signed-off-by: Margarita Olaya Cabrera <magi.olaya@ti.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>