| commit | 2eae5d6bfa5f5d3e815cd0c76d864c0ff09b2c4c | [log] [tgz] |
|---|---|---|
| author | Madhav Chauhan <madhav.chauhan@intel.com> | Thu Nov 29 16:12:28 2018 +0200 |
| committer | Jani Nikula <jani.nikula@intel.com> | Mon Dec 03 15:54:44 2018 +0200 |
| tree | 4b84e503b7c0b95591980514ab999bd5759448dc | |
| parent | 2ca711caeca2c6a4f3026d9fbdb135b65d7d68b3 [diff] |
drm/i915/icl: Get pipe timings for DSI Transcoder timings for Gen11 DSI encoder is available at pipe level unlike in older platform where port specific registers need to be accessed. v2 by Jani: - get timings for (!dsi || icl) instead of (dsi && icl). Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f60e0c1aee08248e758da3219d3239898b43ba41.1543500286.git.jani.nikula@intel.com