| commit | 2c7f9a4df9def07867087a520bc32169e2eec9f8 | [log] [tgz] |
|---|---|---|
| author | Colin Xu <colin.xu@intel.com> | Thu Feb 14 12:56:33 2019 +0800 |
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | Mon Feb 18 17:19:11 2019 +0800 |
| tree | b6c782e3494f3e76ac1433e790e8d6c72b82bcba | |
| parent | 39c68e87bc50a71bcfe93582d9b0673ef30db418 [diff] |
drm/i915/gvt: Use consist max display pipe numbers as i915 definition GVT implements a homogeneous vGPU as host GPU so max vGPU display pipes can't exceed HW. The inconsistency definition has potential risks which could cause array indexing overflow. Remove the unnecessary define of INTEL_GVT_MAX_PIPE and align with i915. Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Colin Xu <colin.xu@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>