| commit | 2a8bfa139a4515cd020c7a5be1e1e45d5d116352 | [log] [tgz] |
|---|---|---|
| author | Jack Xiao <Jack.Xiao@amd.com> | Mon May 06 16:28:22 2019 +0800 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Fri Jun 21 18:59:28 2019 -0500 |
| tree | cb50d543b6ceca32ff013a33e02988207efdc623 | |
| parent | 8c3b2d1bc0ec339d0f0747f87b130ed8ea9f9777 [diff] |
drm/amd/powerplay/smu11: disable PLL shutdown when gfxoff enabled MP1 cannot access clock IP during MP1 FW reload, disable PLL shutdown as a workaround. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>