clk: rockchip: fix rk3399 aclk_vio gate bit

Fix incorrect rk3399 aclk_vio gating bit, it should be 0, not 10.

Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399")
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
1 file changed