tree 8e4b34fade904bbd4e01c94f90212d9ad6654eba
parent 38dbfb59d1175ef458d006556061adeaa8751b72
author Chao Fu <B44548@freescale.com> 1392190145 +0800
committer Mark Brown <broonie@linaro.org> 1392513323 +0800

spi/fsl-dspi: Convert to use regmap and add big-endian support

Freescale DSPI module will have two endianess in different platform,
but ARM is little endian. So when DSPI in big endian, core in little endian,
readl and writel can not adjust R/W register in this condition.
This patch will remove general readl/writel, and import regmap mechanism.
Data endian will be transfered in regmap APIs.

Documents: dspi add bool "big-endian" in dts node if DSPI module
work in big endian.

Signed-off-by: Chao Fu <b44548@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>