| commit | 17a839135f7356d9e1cff653ea861b1b890c9d6c | [log] [tgz] |
|---|---|---|
| author | Evan Quan <evan.quan@amd.com> | Fri May 17 13:39:36 2019 +0800 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Fri May 24 12:21:01 2019 -0500 |
| tree | 5357bae47cc522ea82705eb8c97922b1c0bff181 | |
| parent | d6ee400e793f0ae6c9f5926bea9fbb362a950d96 [diff] |
drm/amd/powerplay: fix sw SMU wrong UVD/VCE powergate setting The UVD/VCE bits are set wrongly. This causes the UVD/VCE clocks are not brought back correctly on needed. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>